PCM Decoder

PCM Decoder

PCM Decoder
Technical Data:
Input PCM DATA serial: TTL level data stream in offset binary format
Input Format: 8 bits, including frame synchronization bit as LSB
Digitizing Formats: 7-bits linear, 4-bits linear, and 4-bits companded
Companded Formats: 4-bit A4-Law, and 4-bit ?4-Law (PCB selectable)
Bit Clock Input: <10kHz, TTL level; positive edges of CLK & PCM DATA coincident
Output Signal: +/-2Vpk, DC coupled
Frame Synchronization: LINE and EMBEDDED modes
LINE Mode synchronization signal coincident with frame’s LSB

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